piel.tools.cocotb.core#

The objective of this file is to provide the simulation connection and interconnection to consider modelling digital and mixed signal logic.

The main simulation driver is cocotb, and this generates a set of files that correspond to time-domain digital simulations. The cocotb verification software can also be used to perform mixed signal simulation, and digital files can be inputted as a bitstream into a photonic solver, although the ideal situation would be to have integrated photonic time-domain measurement alongside the electronic simulation solver, and maybe this is where it will go. It can be assumed that, as is currently, cocotb can interface python with multiple solvers until someone (and I’d love to do this) writes an equivalent python-based or C++ based python time-domain simulation solver.

The nice thing about cocotb is that as long as the photonic simulations can be written asynchronously, time-domain simulations can be closely integrated or simulated through this verification software.

Attributes#

delete_simulation_output_files

Functions#

`check_cocotb_testbench_exists`(→ bool)	Checks if a Cocotb testbench exists in the specified design directory.
`configure_cocotb_simulation`(→ pathlib.Path)	Configures a Cocotb simulation by generating a Makefile in the specified directory.
`run_cocotb_simulation`(→ subprocess.CompletedProcess)	Runs the Cocotb simulation by executing the Makefile in the specified design directory.

Module Contents#

check_cocotb_testbench_exists(design_directory: str | pathlib.Path) → bool[source]#

Checks if a Cocotb testbench exists in the specified design directory.

Parameters:: design_directory (str | pathlib.Path) – The directory where the design files are located.
Returns:: True if a Cocotb testbench exists, False otherwise.
Return type:: bool

Examples

>>> check_cocotb_testbench_exists("/path/to/design")
True

configure_cocotb_simulation(design_directory: str | pathlib.Path, simulator: piel.types.digital.HDLSimulator, top_level_language: piel.types.digital.HDLTopLevelLanguage, top_level_verilog_module: str, test_python_module: str, design_sources_list: list | None = None) → pathlib.Path[source]#

Configures a Cocotb simulation by generating a Makefile in the specified directory.

This function creates a Makefile required to run Cocotb simulations. It includes paths to design source files and sets up the simulator and language options.

Parameters:

design_directory (str | pathlib.Path) – The directory where the design files are located.
simulator (Literal["icarus", "verilator"]) – The simulator to use for the simulation.
top_level_language (Literal["verilog", "vhdl"]) – The top-level HDL language used in the design.
top_level_verilog_module (str) – The top-level Verilog module name.
test_python_module (str) – The Python test module name for Cocotb.
design_sources_list (list | None, optional) – A list of design source file paths. Defaults to None.

Returns:

The path to the generated Makefile.

Return type:

pathlib.Path

Examples

>>> configure_cocotb_simulation("/path/to/design", "icarus", "verilog", "top_module", "test_module")
PosixPath('/path/to/design/tb/Makefile')

delete_simulation_output_files#

run_cocotb_simulation(design_directory: str, raise_error: bool = False) → subprocess.CompletedProcess[source]#

Runs the Cocotb simulation by executing the Makefile in the specified design directory.

Parameters:: design_directory (str) – The directory where the design files are located.
Returns:: The completed process object containing the result of the simulation run.
Return type:: subprocess.CompletedProcess

Examples

>>> run_cocotb_simulation("/path/to/design")