piel.tools.cocotb.core
======================

.. py:module:: piel.tools.cocotb.core

.. autoapi-nested-parse::

   The objective of this file is to provide the simulation connection and interconnection to consider modelling digital and mixed signal logic.

   The main simulation driver is cocotb, and this generates a set of files that correspond to time-domain digital
   simulations. The cocotb verification software can also be used to perform mixed signal simulation, and digital files
   can be inputted as a bitstream into a photonic solver, although the ideal situation would be to have integrated
   photonic time-domain measurement alongside the electronic simulation solver, and maybe this is where it will go. It can be
   assumed that, as is currently, cocotb can interface python with multiple solvers until someone (and I'd love to do
   this) writes an equivalent python-based or C++ based python time-domain simulation solver.

   The nice thing about cocotb is that as long as the photonic simulations can be written asynchronously, time-domain
   simulations can be closely integrated or simulated through this verification software.



Attributes
----------

.. autoapisummary::

   piel.tools.cocotb.core.delete_simulation_output_files


Functions
---------

.. autoapisummary::

   piel.tools.cocotb.core.check_cocotb_testbench_exists
   piel.tools.cocotb.core.configure_cocotb_simulation
   piel.tools.cocotb.core.run_cocotb_simulation


Module Contents
---------------

.. py:function:: check_cocotb_testbench_exists(design_directory: str | pathlib.Path) -> bool

   Checks if a Cocotb testbench exists in the specified design directory.

   :param design_directory: The directory where the design files are located.
   :type design_directory: str | pathlib.Path

   :returns: True if a Cocotb testbench exists, False otherwise.
   :rtype: bool

   .. rubric:: Examples

   >>> check_cocotb_testbench_exists("/path/to/design")
   True


.. py:function:: configure_cocotb_simulation(design_directory: str | pathlib.Path, simulator: piel.types.digital.HDLSimulator, top_level_language: piel.types.digital.HDLTopLevelLanguage, top_level_verilog_module: str, test_python_module: str, design_sources_list: list | None = None) -> pathlib.Path

   Configures a Cocotb simulation by generating a Makefile in the specified directory.

   This function creates a Makefile required to run Cocotb simulations. It includes paths to design source files and sets up the simulator and language options.

   :param design_directory: The directory where the design files are located.
   :type design_directory: str | pathlib.Path
   :param simulator: The simulator to use for the simulation.
   :type simulator: Literal["icarus", "verilator"]
   :param top_level_language: The top-level HDL language used in the design.
   :type top_level_language: Literal["verilog", "vhdl"]
   :param top_level_verilog_module: The top-level Verilog module name.
   :type top_level_verilog_module: str
   :param test_python_module: The Python test module name for Cocotb.
   :type test_python_module: str
   :param design_sources_list: A list of design source file paths. Defaults to None.
   :type design_sources_list: list | None, optional

   :returns: The path to the generated Makefile.
   :rtype: pathlib.Path

   .. rubric:: Examples

   >>> configure_cocotb_simulation("/path/to/design", "icarus", "verilog", "top_module", "test_module")
   PosixPath('/path/to/design/tb/Makefile')


.. py:data:: delete_simulation_output_files

.. py:function:: run_cocotb_simulation(design_directory: str, raise_error: bool = False) -> subprocess.CompletedProcess

   Runs the Cocotb simulation by executing the Makefile in the specified design directory.

   :param design_directory: The directory where the design files are located.
   :type design_directory: str

   :returns: The completed process object containing the result of the simulation run.
   :rtype: subprocess.CompletedProcess

   .. rubric:: Examples

   >>> run_cocotb_simulation("/path/to/design")